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Principles and Structures of FPGAs was published from Springers

2016年度秋学期の計算機構成の授業資料がアップされました。

計算機構成ホームページ

ディジタル回路設計とコンピュータアーキテクチャ ARM版が発売されました。

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FPGAの原理と構成(オーム社)が発売されました。

FPGAの原理と構成が発売されました。
978-4-274-21864-4 (1)

2015年度OB・OG会

3/12(土)に2015年度天野研究室のOB・OG会を開催しました。
IMG_0488

2015年度計算機構成の試験問題、回答例を掲示しました。RENANDIに試験の成績、Webに成績評価基準を公開しました。演習問題は必ず2月3日中に提出してください。2月4日に採点を確定します。

Mr. Naru Sugimoto participated in The International Conference on Field-Programmable Technology(FPT2015)

2st year Master students Naru Sugimoto presented part of their research achievement in the International Conference on Field-Programmable Technology(FPT2015). The conference was held in Rydges Lakeland Resort, Queenstown, New Zealand, December 7-9, 2015. The title of his paper is “Trax Solver on Zynq with Deep Q-Network”.

Daichi Fujiki participated in the 24th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP2016)

A 4th year Bachelor student Daichi Fujiki presented a part of his research achievements in the 24th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP2016). The conference was held in Heracleion, Crete, Greece, February 17-19, 2016. The title of his paper is “andomizing Packet Memory Networks for Low-latency Processor-memory Communication.”

Mr. Yu Fujita participated in The 3rd International Symposium on Computing and Networking — Across Practical Development and Theoretical Research —(CANDAR’15)

2st year Master students Yu Fujita presented part of their research achievement in the 3rd International Symposium on Computing and Networking — Across Practical Development and Theoretical Research —(CANDAR’15). The conference was held in Hokkaido, Japan, December 8-11, 2015. The title of his paper is “Power optimization considering the chip temperature of low power reconfigurable accelerator CMA-SOTB” . To view the full manuscript, please check the Publication page.

Mr. Koichiro Masuyama participated in The 10th International Conference on ReConFigurable Computing and FPGAs

1st year Master students Koichiro Masuyama presented part of their research achievement in the 10th International Conference on ReConFigurable Computing and FPGAs. The conference was held in Riviera, Mexico, December 7-9, 2015. The title of his paper is “A 297MOPS/0.4mW Ultra Low Power Coarse‐graind Reconfigurable Accelerator CMA‐SOTB‐2” . To view the full manuscript, please check the Publication page.

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