Hayate Okuhara (奥原　颯)
Amano-Lab,Dept. of Information and Computer Science, Keio University
mail:hayate_at_am.ics.keio.ac.jp












Biography

Resarch interest
 Low-power VLSI and circuit design
power computer architecture

Publications
    Journal
  1. Takuya Kojima, Naoki Ando, Hayate Okuhara, Ng. Anh Vu Doan, Hideharu Amano, "Optimization of Body Biasing for Variable Pipelined Coarse-Grained Reconfigurable Architectures", IEICE Tran. on Information and Systems, Vol.E101-D, No. 6, pp.1532-1540, 2018.
  2. Hayate Okuhara, Akram Ben Ahmed, Hideharu Amano,"Digitally Assisted On-chip Body Bias Tuning Scheme for Ultra Low-power VLSI Systems", IEEE Transactions on Circuits and Systems I: Regular Papers, 2018 (Accepted for publication).
  3. Hayate Okuhara, Akram Ben Ahmed, Johannes Maximilian Kühn, Hideharu Amano, "Asymmetric Body Bias Control with Low Power FD-SOI Technologies: Modeling and Power Optimization", IEEE Transactions on Very Large Scale Integration Systems, Vol. 26, No. 7, pp.1254-1267, 2018.
  4. Koichiro Masuyama, Yu Fujita, Hayate Okuhara, Hideharu Amano,"Ultra Low Power Reconfigurable Accelerator", IEICE Tran. on Information and Systems, Vol.J101-D,No.5,pp.-,Apr. 2018 (to be published in Japanese).
  5. Carlos Cesar Cortes Torres, Hayate Okuhara, Nobuyuki Yamasaki, Hideharu Amano,"Analysis of Body Bias Control Using Overhead Conditions for Real Time Systems: A Practical Approach", IEICE Tran. on Information and Systems, Vol.E101-D,No.4,pp.-,Apr. 2018 (to be published).
  6. Yusuke, Matsushita, Hayate Okuhara, Koichiro Masuyama, Yu Fujita, Ryuta Kawano, and Hideharu Amano,"Body Bias Domain Partitioning Size Exploration for Coarse Grained Reconfigurable Accelerator", IEICE Tran. on Information and Systems, Vol.E 100-D, No.12, pp.2828-2836, 2017.
  7. Hayate Okuhara,Yu Fujita, Kimiyoshi Usami, and Hideharu Amano, "Power Optimization Methodology for Ultra Low Power Microcontroller with Silicon on Thin BOX MOSFET", IEEE Transactions on Very Large Scale Integration Systems, Vol.25, Issue4, pp.1578-1582, 2017.
  8. Hayate Okuhara, Kuniaki Kitamori, Kimiyoshi Usami, and Hideharu Amano, "A Research of Dynamic Body Bias Control on Micro Controller V850 Using SOTB MOSFET", The IPSJ Journal, Vol.57, No.2, pp.708-717, Feb. 2016.(in Japanese)

    International Conference
  9. Takuya Kojima, Naoki Ando, Yusuke Matsushita, Hayate Okuhara, Ng. Anh Vu Doan, Hideharu Amano, "Real Chip Evaluation of a Low Power CGRA with Optimized Application Mapping", Proc. of The 2018 International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, pp.xx-xx, June 2018.
  10. Sayaka Terashima, Takuya Kojima, Hayate Okuhara, Yusuke Matsushita, Naoki Ando, Mitaro Namiki, Hideharu Amano, "A Shared Memory Chip for Twin-Tower of Chips", Proc. of The 21th Workshop on Synthesis And System Integration of Mixed Information Technologies(SASIMI2018),pp.xx-xx, March 2018.(Poster)
  11. Takuya Kojima, Naoki Ando, Hayate Okuhara, Hideharu Amano, "Glitch-aware variable pipeline optimization for CGRAs", Proc. of The 2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig), pp.xx-xx, Dec. 2017(Poster)
  12. Takuya Kojima, Naoki Ando, Hayate Okuhara, Ng. Anh Vu Doan, Hideharu Amano, "Body bias optimization for variable pipelined CGRA", Proc. of The 2017 International Conference on Field Programmable Logic and Applications (FPL), pp.1-4, Sept. 2017(Poster)
  13. Hayate Okuhara, Akram Ben Ahmed, Johannes Maximilian Kühn, and Hideharu Amano, "Leveraging Asymmetric Body Bias Control for Low Power LSI Design", Proc of The 2017 IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips 20), pp. 1-3, April 2017.(Oral)
  14. Naoki Ando, Koichiro Masuyama, Hayate Okuhara, Hideharu Amano, "Variable pipeline structure for Coarse Grained Reconfigurable Array CMA", Proc. of The 2016 International Conference on Field Programmable Technology (FPT), pp.217-220, Sept. 2017(Poster)
  15. Yusuke Matsushita, Hayate Okuhara, Koichiro Masuyama, Yu Fujita, Ryuta Kawano, Hideharu Amano, "Body bias grain size exploration for a coarse grained reconfigurable accelerator", Proc. of The 2016 International Conference on Field Programmable Logic and Applications (FPL), pp.1-4, Sept. 2017(Poster)
  16. Johannes Maximilian Kühn, Akram Ben Ahmed, Hayate Okuhara, Hideharu Amano, "MuCCRA4-BB: A fine-grained body biasing capable DRP", Proc. of the 2016 IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XIX), pp.1-3, April 2016.(Oral)
  17. Koichiro Masuyama, Yu Fujita, Hayate Okuhara, Hideharu Amano, "A 297mops/0.4mw ultra low power coarse-grained reconfigurable accelerator CMA-SOTB-2", Proc of the 2015 International Conference onf ReConFigurable Computing and FPGAs (ReConFig), pp.1-6, Dec. 2015 (Poster).
  18. Yu Fujita, Hayate Okuhara, Koichiro Masuyama, Hideharu Amano, "Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB", Proc of the 2015 Third International Symposium on Computing and Networking (CANDAR), pp.21-29, Dec. 2015 (Oral).
  19. Hayate Okuhara, Kuniaki Kitamori, Yu Fujita, Kimiyoshi Usami, and Hideharu Amano,"An Optimal Power Supply And Body Bias Voltage for a Ultra Low Power Micro-Controller with Silicon on Thin BOX MOSFET", Proc. of the 2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp.207-212, July 2015.(Oral, acceptance rate for oral presentaion:19.7%)
  20. Hayate Okuhara, Kimiyoshi Usami, and Hideharu Amano, "A Leakage Current Monitor Circuit Using Silicon on Thin BOX MOSFET for Dynamic Back Gate Bias Control", Proc. of the 2015 IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XVIII), pp.1-3, April 2015.(Oral)
  21. Hayate Okuhara, Hideharu Amano,"Time Analysis of Applying Back Gate Bias for Reconfigurable Architectures with SOTB MOSFET", Proc. of The 19th Workshop on Synthesis And System Integration of Mixed Information Technologies(SASIMI2015),pp.299-304,Mar 2015.(Poster)
Awards