MuCCRA Chips

MuCCRA-1

MuCCRA-1 layout

  • Date : 2006
  • Die Size : 5.0 x 5.0[mm^2]
  • Process : Rohm 0.18um
  • No. of PE : 4 x 4
  • PE style : Heterogeneous
  • Data Width : 24bit
  • Context Size : 64
  • Interconnect : Island style

MuCCRA-2

MuCCRA-2 layout

  • Date : 2007
  • Die Size : 2.5 x 2.5[mm^2]
  • Process : ASPLA 90um
  • No. of PE : 4 x 4
  • PE style : Homogeneous
  • Data Width : 16bit
  • Context Size : 16
  • Interconnect : Island style

MuCCRA-3

  • Year : 2009
  • Die size : 2.1×4.2[mm^2]
  • Process : Fujitsu 65nm
  • No. of PE : 4 x 4
  • PE style : Homogeneous
  • Data Width : 16bit
  • Context Size : 32
  • Interconnect : Hybrid style(Island & Direct)

2009年のICFPTにて,MuCCRA-3の実チップを用いてデモンストレーションを行いました. カメラからの画像をリアルタイムに処理し,FPGAに対して約10倍の電力効率を達成できます.

We have MuCCRA-3 real chip demonstrated in ICFPT 2009, 2010. In the demonstration, MuCCRA-3 processing image of captured from camera in real time. it achieved x10 power-efficiency compared with Xilinx's virtex-5 FPGA which using same process technology.

MuCCRA-Cube

  • Year : 2009
  • Die size : 2.1×4.2[mm^2]
  • Process : Fujitsu 65nm
  • No. of PE : 4 x 4 x 4 (4 chip stacked)
  • PE style : Homogeneous
  • Data Width : 16bit
  • Context Size : 32
  • Interconnect : Hybrid style & Inductive Coupling

MuCCRA-Cube is a prototype chip for evaluation of chip-to-chip connection using inductive coupling. The result of evaluation, it can achieved over 4Gbps throughput without any bonding wires between chip and chip!

muccra_chips.txt · 最終更新: 2011/04/05 07:19 (外部編集)
トレース: » muccra_chips
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