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Unit represents a functional block of hardware. A unit working with a clock is called a synchronous unit, while a unit operates with a packet arrival is called an asynchronous unit. Most of provided units are synchronous unit.
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unit
class is a base class of all functional units with state
transition. All class which represents units are implemented as a
derived class of this class. unit
class is an abstract class
which specifies an interface for reset of the state to its derived
class. This class is used only for a base class of
asynchronous_unit
class and synchronous_unit
class.
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asynchronous_unit
class is a base class of units which operates
with an arrival of a packet. All classes which represents
asynchronous units is implemented as its derived class. Unlike a
synchronous unit, it is activated with packet arrival, and so hardware
units without delay can be implemented. asynchronous_unit
class is an abstract class which specifies an interface for activation
to its derived class.
asynchronous_unit
class provides the following pure virtual
functions. Concrete derived classes are required to give definition
of pure virtual functions. asynchronous_unit
class is
implemented as a derived class of a root_object
class, and so
pure virtual functions of root_object
should be implemented
also. See section 4.1 root_object class.
void activate(port&)
class
object automatically, and so
unnecessary calling is prohibited.
void reset(void)
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synchronous_unit
class is a base class of units providing state
transition synchronized with a clock. synchronous_unit
class
is an abstract class, and specifies an interface for state transition
(clock inputs) and initialization of state transition.
There are two state transition functions, and called alternatively.
One is for information input phase, and another is for information
output phase. Input/output of information is done with an object
of port
class.
synchronous_unit
provides the following pure virtual functions.
Derived classes are required to specify definition of all pure virtual
functions. Since synchronous_unit
is implemented as a derived
class of a root_object
class, pure virtual functions of
root_object
class should be implemented also.
See section 4.1 root_object class.
void clock_in(void)
void clock_out(void)
void reset(void)
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synchronous_unit_set
class is a unit for treating a set of
synchronous units as a single synchronous unit. It is used to
implement such as a processing unit. It provides a list of pointers
in the synchronous units, and distributes clock and reset signals to
units in the list.
The following four protected member functions are provided for derived classes. Derived class arranges function of a synchronous unit using the following functions.
void insert_synchronous_unit(synchronous_unit&)
void erase_synchronous_unit(synchronous_unit&)
void insert_synchronous_unit_set(synchronous_unit_set&)
void erase_synchronous_unit_set(synchronous_unit_set&)
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processor
class is an abstract class for representing
processors. It is a base class of all processors. Since it is a
derived class of single_port_synchronous_unit
class, users must
define pure virtual functions in single_port_synchronous_unit
and the followings.
virtual data_type register_file(size_t) const
virtual address_type program_counter(void) const
virtual bool is_halt(void) const
virtual bool is_stall(void) const
virtual bool is_reading(void) const
virtual bool is_writing(void) const
virtual bool is_user_mode(void) const
virtual bool is_kernel_mode(void) const
virtual void halt(void)
virtual size_t frequency_magnification(void) const
virtual void set_frequency_magnification(size_t)
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memory_control_unit
class represents a memory controller. By
connecting with mapped_memory
class, the first level storage is
formed. A single word, burst and split transaction transfer are
supported. Read access time and write access time are individually
set.
unsigned int read_wait(void) const
unsigned int write_wait(void) const
void set_read_wait(unsigned int)
void set_write_wait(unsigned int)
bool is_connected_to_memory(void) const
void connect_memory(memory_type&)
void disconnect_memory(void)
void enable_split_transaction(void)
void disable_split_transaction(void)
Furthermore, to support memory controllers with individual operations like Fetch-and-decrement, the following protected functions are virtualized.
data_type read(address_type)
void write(address_type, data_type)
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fetch_and_dec_control_unit
class represents a memory
controller. A read request is operated as a Fetch-and-decrement.
This class is a derived class of memory_control_unit
class, so
the usage is the same. See section 8.6 memory_control_unit class.
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halt_detector
class is a class for detection stop of the
system. It is a simple synchronous unit which detects writing
requests into the pre-defined address. Defining this detection as a
halt operation, system halt signal is easily transferred between the
software and the simulator.
void set_address(address_type)
address_type address(void) const
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bus_error_detector
class detects a bus error. A succeeding
memory address request on a bus is treated as a bus error.
void set_timeout(unsigned int)
bool is_bus_error(void) const
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timer
class represents a timer. The object has an internal
counter, which is incremented with a clock input. Using this unit,
execution time measurement from simulator softwares is possible.
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tracewriter_unit
class traces addresses of memory accesses and
outputs to an address trace file. It watches packets on a connected
bus, and waits for read/write requests in the specified address range.
If an access request is detected, the time, the processor number, the
access type and the address are output to the connected stream. The
values are represented with hexadecimal. Pre specified ID number or
bus owner ID number is used as a processor identifier.
int id(void) const
bool is_valid_address(address_type) const
void set_id(int)
void reset_id(void)
void set_valid_address(address_type, size_type)
void connect_stream(ostream&)
void disconnect_stream(void)
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comm_io_unit
class manages communication between simulated
computers and simulators. Half-duplex character base communication
between units are provided. Communication with a simulated computer
is done through the hardware registers on mapped_memory
class
address space. A software on a simulator controls read/write to
specified address.
Processing in the simulator is performed with send/receive queues in
comm_io_unit
. The user can control communication by accessing
queues.
Processing in the software is performed with send_to_host
and
receive_from_host
in OSIRIS library, and so the user does not
care about real communication protocol.
This class is designed as a part of other units. Access request itself is not processed, and the memory access should be processed other units.
8.12.1 comm_io_unit class definition 8.12.2 comm_io_unit class register 8.12.3 Communication protocol of comm_io_unit class
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comm_io_unit(address_type, size_type)
void set_address(address_type, size_type)
bool is_big_endian(void) const
bool is_little_endian(void) const
void set_big_endian(void)
void set_little_endian(void)
bool can_put(void) const
bool can_get(void) const
void put(char_type)
char_type get(void)
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comm_io_unit
class manages communication between simulated
computers and simulators. The following four hardware registers are
used.
These registers are allocated when hardware registers are initialized with the setup function. The allocations are as follows.
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Communication between the simulated computer and the simulator is activated with accessing of the computer to hardware registers. Other than hardware registers, sending/receiving queues provided simulators are used for data communication.
The header which decides the type of the packet is defined with the header file `io_protocol.h'. This file is shared with compilers of simulators and simulated softwares.
The following software processing is performed with
send_to_host
and receive_from_host
functions in OSIRIS
library, and user does not care about the user protocol.
COMM_IO_SEND_REQUEST
to the header register.
COMM_TO_SEND_REQUEST
is written in the header, and
store the data into receiving queues in the unit. If receiving is
successful, write COMM_TO_ACK
to the header register, and the
data size to the packet size register. If there is some problem,
write COMM_IO_NACK
to the header.
COMM_IO_ACK
is written in the header register.
COMM_IO_RECEIVE_REQUEST
to the header register.
COMM_IO_RECEIVE_REQUEST
into the header,
and pulls data from sending queue (send_queue
) and stores it
into data register. If sending is successful, write
COMM_IO_ACK
to the header register and write the sending data
size to the packet size register. If there is some problem, write
COMM_IO_NACK
to the header.
COMM_IO_ACK
is written in the header register, and
receive the data.
can_put
member function.
put
member function.
can_get
member function.
get
member function.
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multi_io_unit
class is a unit which supports multiple
input/output functions simultaneously. Using the unit, the detection
of system stop, associative array database with sysinfo_map
,
referring the command line parameters and reporting the finish status
with argument_map
, and measuring the time.
Since processing in software side is done with the communication
functions for multi_io_unit
in OSIRIS library, users don't need
to care on the real communication protocol.
8.13.1 multi_io_unit class definition 8.13.2 Communication protocol of multi_io_unit class
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void set_address(address_type, size_type)
bool is_halt(void) const
bool is_defined_sysinfo(const string&) const
bool is_defined_integer_sysinfo(const string&) const
bool is_defined_string_sysinfo(const string&) const
data_type get_integer_sysinfo(const string&) const
const string& get_string_sysinfo(const string&) const
void set_sysinfo(const string&, data_type)
void set_sysinfo(const string&, const string&)
void unset_sysinfo(const string&)
void set_file_table_size(size_t)
void set_file_input_stream(size_t, istream&)
void set_file_output_stream(size_t, ostream&)
unsigned long timer_clock_value(void) const
int commandline_argc(void) const
const char* commandline_argv(size_t) const
void set_commandline_argument(const char* const*)
void commandline_status(void) const
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The software on the simulator controls input/output operations by
communicating with multi_io_unit
class according to the
following communication protocol. Constants used in the protocol are
defined in `io_protocol.h'.
Also, a sequence of communication protocol is stored in the path based
on the virtual characters, and communication protocol for
comm_io_unit
class should be used as a lower communication
protocol. See section 8.12.3 Communication protocol of comm_io_unit class.
IO_HALT_REQUEST
(1byte).
COMM_IO_ACK
(1byte).
IO_SYSINFO_READ_INTEGER_REQUEST
(1byte), the length of the
key (sizeof(int) byte) and the key string (n byte).
IO_COMM_ACK
means success and
IO_COMM_NACK
does failed. If the reply means failed, the
process is terminated here.
IO_SYSINFO_READ_STRING_REQUEST
(1byte), the length of the
key (sizeof(int) byte) and the key string (n byte).
IO_COMM_ACK
means success and
IO_COMM_NACK
does failed. If the reply means failed, the
process is terminated here.
IO_SYSINFO_WRITE_INTEGER_REQUEST
(1byte), the length of
the key (sizeof(int) byte), the key string (n byte), and the integer
(sizeof(int) byte).
IO_COMM_ACK
means success and
IO_COMM_NACK
does failed.
IO_SYSINFO_WRITE_STRING_REQUEST
(1byte), the length of the
key (sizeof(int) byte), the key (n byte), the length of the value
string (sizeof(int) byte), and the value string (n byte).
IO_COMM_ACK
means success and
IO_COMM_NACK
does failed.
IO_FILE_OPEN_REQUEST
(1byte), the flags (1byte), the
length of the file name (sizeof(int) byte), the file name (n byte).
The meaning of each flag is defined as IO_FILE_OPEN_* in
`io_protocol.h'.
IO_COMM_ACK
means success and
IO_COMM_NACK
does failed. If the reply means failed, the
process is terminated here.
IO_FILE_CLOSE_REQUEST
(1byte), the file descriptor
(sizeof(int) byte).
IO_COMM_ACK
means success and
IO_COMM_NACK
does failed.
IO_FILE_READ_REQUEST
(1byte), the file descriptor
(sizeof(int) byte).
IO_COMM_ACK
means success and
IO_COMM_NACK
does failed. If the reply means failed, the
process is terminated here.
IO_FILE_WRITE_REQUEST
(1byte), the file descriptor
(sizeof(int) byte).
IO_COMM_ACK
means success and
IO_COMM_NACK
does failed. If the reply means failed, the
process is terminated here.
IO_FILE_LSEEK_REQUEST
(1byte), the file descriptor
(sizeof(int) byte).
IO_COMM_ACK
means success and
IO_COMM_NACK
does failed. If the reply means failed, the
process is terminated here.
IO_FILE_SEEK_*
in `io_protocol.h'.
argc
of command line arguments
IO_COMMANDLINE_READ_ARGC_REQUEST
(1byte).
IO_COMM_ACK
means success and
IO_COMM_NACK
does failed. If the reply means failed, the
process is terminated here.
argc
(sizeof(int) byte).
argv
in command line arguments
IO_COMMANDLINE_READ_ARGV_REQUEST
(1byte) and the index
number of argv
to be read (sizeof(int) byte).
IO_COMM_ACK
means success and
IO_COMM_NACK
does failed. If the reply means failed, the
process is terminated here.
argv
(sizeof(int) byte) and the value of
argv
(n byte).
IO_COMMANDLINE_WRITE_STATUS_REQUEST
(1byte) and the status
code (sizeof(int) byte).
IO_COMM_ACK
means success and
IO_COMM_NACK
does failed.
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router
class is an abstract class representing routers for
interconnection network. All router are implemented as its derived
class.
It provides specified number of input and output channels and each of them has a certain number of virtual channels. Crossbar for input physical channels and output physical channels, channel controllers and lock flag tables for each virtual channels are provided. For state inspection, counters which counts the total number of routed packets are also provided.
All routers are used through public interfaces of router
class.
The functions of derived classes are implemented with defining virtual
functions including limited public members.
8.14.1 Public interface of router 8.14.2 Protected interface of router 8.14.3 Channel controller of router 8.14.4 How to create a new router
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virtual void setup(void)
virtual void reset_counter(void)
virtual_channel_input& input_channel(size_t)
virtual_channel_output& output_channel(size_t)
node_address_type node_address(void) const
void set_node_address(node_address_type)
size_t input_size(void) const
size_t output_size(void) const
size_t channel_size(size_t) const
size_t buffer_size(size_t) const
size_t buffer_length(size_t) const
void set_channel_size(size_t, size_t)
void set_buffer_size(size_t, size_t)
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channel_controller& internal_controller(size_t, size_t)
crossbar& internal_crossbar(void)
bool is_locked_output_virtual_channel(size_t, size_t)
void lock_output_virtual_channel(size_t, size_t)
bool unlock_output_virtual_channel(size_t, size_t)
void set_input_size(size_t)
void set_output_size(size_t)
void increment_total_hop_count(void)
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A channel controller inside the router is implemented as a class. It provides the following values and states.
The operation of the channel controller is defined with the following three states. Packet transfer is done with circulation of them. The sub-state active/inactive is used in the transfer state.
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To define a router class, the following pure virtual functions must be defined.
clock_in
clock_out
setup
reset
It is cumbersome job to describe all functions with a derived class.
For easy implementation, deterministic_router
class and
duato_router
class are defined. See section duato_router class.
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deterministic_router
class is a base class of the deterministic
router. It is a derived class of router
class and
clock_in
function, clock_out
, setup
and
reset
which are not defined in router
class are defined.
In its derived class, only a virtual function routing
is needed
to be defined.
void routing(const packet_type&, channel_controller&)
The class performs the following processing synchronized with a clock.
[clock_in] select_output_virtual_channel
[clock_in] arbitrate_output_virtual_channel
[clock_in] arbitrate_output_physical_channel
[clock_out] transmit_packet
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duato_router
class is a base class of a router class with
adaptive routing according to Duato's minimum and sufficient
conditions. It is a derived class of router
class and
clock_in
function, clock_out
, setup
and
reset
which are not defined in router
class are defined.
In its derived class, a virtual function adaptive_routing
and
escape_routing
must be defined.
void adaptive_routing(const packet_type&, channel_controller&)
void escape_routing(const packet_type&, channel_controller&)
The class performs the following processing synchronized with a clock.
[clock_in] arbitrate_output_channel_for_adaptive
[clock_in] select_output_virtual_channel
[clock_in] arbitrate_output_virtual_channel
[clock_in] arbitrate_output_physical_channel
[clock_out] transmit_packet
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network_interface
class is a synchronous unit which represents
a network interface. It is connected with the router. If is not an
abstract class. Since the public interface does not provide the
sending/receiving packet functions, derived classes are used for a
real network interface.
It provides an input channel and an output channel, specified size of sending and receiving queues. Counters are provided for counting sending packets/flits, receiving packets/flits, and delay of receiving packets.
In the current implementation, all clocks of network interface in a simulator should be the same for measuring the delay of receiving packets.
8.17.1 Public interface of network_interface 8.17.2 Protected interface of network_interface
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size_t send_queue_size(void) const
void set_send_queue_size(size_t)
size_t receive_queue_size(void) const
void set_receive_queue_size(size_t)
size_t send_queue_length(void) const
size_t receive_queue_length(void) const
const virtual_channel_input& input_channel(void) const
const virtual_channel_output& output_channel(void) const
node_address_type node_address(void) const
void set_node_address(node_address_type)
size_t send_packet_count(void) const
size_t send_flit_count(void) const
size_t receive_packet_count(void) const
size_t receive_flit_count(void) const
timestamp_type total_latency(void) const
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bool is_ready_to_enqueue(void) const
bool is_ready_to_dequeue(void) const
void enqueue_send_packet(packet_type*)
packet_type* look_received_packet(void)
packet_type* look_received_packet(void)
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dummy_network_interface
class is used in a probabilistic
simulation. It is a derived class of network_interface
class.
It sends packets with specified size and destination, discards
receiving packets at destination.
bool is_ready(void) const
void send_packet(node_address_type dst, size_t len)
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single_processing_element
class is a synchronous unit which
integrates a single processor and a memory map. The parameter passing
for the program is also supported.
The followings are all pure virtual function, and must be defined in the derived classes.
virtual const processor_type& processor(void) const
virtual const memory_map_type& memory_map(void) const
virtual bool is_halt(void) const
virtual bool is_bus_error(void) const
virtual address_type bus_error_address(void) const
virtual size_t processor_number(void) const
virtual size_t processor_id(void) const
virtual void set_processor_number(size_t)
virtual void set_processor_id(size_t)
virtual void set_file_table_size(size_t)
virtual void set_standard_input_stream(istream&)
virtual void set_standard_output_stream(ostream&)
virtual void set_standard_error_stream(ostream&)
virtual void set_commandline_argument(const char* const*)
virtual int commandline_status(void) const
virtual bool is_defined_sysinfo(const string&) const
bool is_defined_integer_sysinfo(const string&) const
bool is_defined_string_sysinfo(const string&) const
data_type get_integer_sysinfo(const string&) const
const string& get_string_sysinfo(const string&) const
void set_sysinfo(const string&, data_type)
void set_sysinfo(const string&, const string&)
void unset_sysinfo(const string&)
data_type timer_clock_value(void) const
virtual bool load(const char*)
virtual void disassemble(ostream&, address_type, size_type) const
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generic_processing_element
class includes a processor, a local
memory, a sysinfo associative array, bus error detection mechanism and
input/output devices. It is a class of processing element of parallel
machines.
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